基于FPGA的卷积神经网络加速模块设计

梅志伟,王维东

Design of Convolutional Neural Network acceleration module based on FPGA

Zhiwei Mei,Weidong Wang

表3 AlexNet卷积层加速性能

Table 3 The acceleration performance of convolutional layers of AlexNet

AlexNet网络层 conv1 conv2 conv3 conv4 conv5 卷积层 性能(GOPS) 18.66 203.59 175.91 172.52 166.13 113.55