基于FPGA的卷积神经网络加速模块设计
Design of Convolutional Neural Network acceleration module based on FPGA
基于FPGA的卷积神经网络加速模块设计 |
| 梅志伟,王维东 |
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Design of Convolutional Neural Network acceleration module based on FPGA |
| Zhiwei Mei,Weidong Wang |
| 图5 片上缓存与复用方式对AlexNet所有卷积层EMA数据量的影响 |
| Fig.5 The effects of on?chip caching and data resuing on EMA data in all convolutional layers of AlexNet |
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