Figure/Table detail

Fully Analog Neural Network based on 1T1R memristor crossbar array and CMOS activation functions
Hang Zhao, Dongxingjian Yang, Cong Wang, Shijun Liang, Feng Miao
Journal of Nanjing University(Natural Sciences), 2025, 61(5): 867-878.   DOI: 10.13232/j.cnki.jnju.2025.05.015

电路功耗 (W)面积(mm2
Tanh1.08×10-38.86×10-4
ReLU8.68×10-48.86×10-4
Sigmoid2.07×10-31.77×10-3
Softmax1.22×10-41.12×10-4
ADC_1[25]6×10-32.28×100
ADC_2[26]3×10-11.2×10-1
ADC_3[27]1.2×10-21.3×10-1
ADC_4[28]3.2×10-13.0×10-1
ADC_5[29]2.1×10-31.8×10-1
ADC_6[29]3.2×10-31.8×10-1
Table 1 Comparison of power consumption and area between analog CMOS activation function circuits and high⁃speed ADC in 65 nm process node
Other figure/table from this article